Trade Ideas
Article details Cadence's accelerating digital full-flow wins (36 in 2024 vs. 10 per year in 2014), Cerebrus AI proliferation (1,000+ tapeouts in 8 quarters with 100% top-10 digital customer penetrati
Article details Cadence's accelerating digital full-flow wins (36 in 2024 vs. 10 per year in 2014), Cerebrus AI proliferation (1,000+ tapeouts in 8 quarters with 100% top-10 digital customer penetration), and margin expansion to 42.5% (highest in the industry). The piece also notes Cadence is gaining share in all major product segments and that its multi-foundry strategy (TSMC, Samsung, Intel, Rapidus) is a structural tailwind.
Risk: Competitive response from Synopsys (e.g., tighter bundling with Ansys) or a downturn in semiconductor design spending could pressure growth; Cadence's digital gains may face diminishing returns as Synopsys defends advanced-node share.
The article highlights several near-term headwinds for Synopsys: organic EDA+IP revenue growth decelerated to ~3% in FY25, IP revenue declined for three consecutive quarters, China revenue dropped 22%
The article highlights several near-term headwinds for Synopsys: organic EDA+IP revenue growth decelerated to ~3% in FY25, IP revenue declined for three consecutive quarters, China revenue dropped 22% due to export controls, and management guided 'muted' IP growth for FY26. The piece also flags that the $35B Ansys acquisition creates integration risk and leverage (~3.9x at close), and that no single customer exceeded 10% of revenue in FY25 (down from Intel's 17.9% peak) due to Ansys dilution rather than organic diversification.
Risk: Synopsys still holds 95%+ advanced-node share and has a massive backlog ($11.4B); the near-term weakness may be transitory as 2nm/14A node transitions and Ansys synergies materialize. The negative stance is relative to near-term earnings momentum, not the long-term moat.
Siemens EDA's Calibre physical verification tool is mandated by TSMC, Samsung, and Intel for tape-out, creating an unassailable blocking position. The article notes Siemens' Altair acquisition complet
Siemens EDA's Calibre physical verification tool is mandated by TSMC, Samsung, and Intel for tape-out, creating an unassailable blocking position. The article notes Siemens' Altair acquisition completes a three-way simulation arms race with Synopsys and Cadence, and that EDA within Siemens Digital Industries is growing double-digit, outrunning the broader PLM portfolio. PAVE360 for automotive system-level verification also opens an adjacent $800M-1.2B TAM.
Risk: EDA is <5% of Siemens' revenue, so capital allocation priority may lag behind larger divisions; reporting opacity and lack of a pure-play valuation may limit investor interest.
The article uses NVIDIA as a case study, stating its chip design costs exceed $100M and that hyperscaler AI silicon (including NVIDIA's own designs) is a primary driver of EDA demand above semiconduct
The article uses NVIDIA as a case study, stating its chip design costs exceed $100M and that hyperscaler AI silicon (including NVIDIA's own designs) is a primary driver of EDA demand above semiconductor R&D growth. The piece also notes that 'verification intensity' and 'AI accelerator proliferation' are core revenue drivers, consistent with ongoing NVIDIA GPU complex designs requiring the full EDA stack at advanced nodes.
Risk: NVIDIA's design costs are factored into its product margins; no direct EDA spend data is provided, and the benefit to NVIDIA is indirect (EDA spending is a cost of goods, not a revenue driver for NVIDIA).
This newsletter, published May 21, 2026,
features Sravan Kundojjala
discussing CDNS, SNPS, SIEGY, NVDA.
4 trade ideas extracted by AI with direction and confidence scoring.
Speakers:
Sravan Kundojjala
· Tickers:
CDNS,
SNPS,
SIEGY,
NVDA