ISSCC 2026: NVIDIA & Broadcom CPO, HBM4 & LPDDR6, TSMC Active LSI, Logic-Based SRAM, UCIe-S and More

Afzal Ahmad · SemiAnalysis · April 15, 2026 at 17:55 · ⏱ 56 min read | Read on Substack ↗

TLDR

ISSCC 2026 reveals that the AI hardware bottleneck is rapidly shifting from pure compute node shrinks to advanced packaging, memory density, and optical interconnects. The market is currently pricing in perpetual dominance for SK Hynix in memory and pure-play AI names, but technical data shows legacy laggards like Samsung (HBM4), Kioxia/WDC (NAND), and Intel (Packaging/Interconnects) are making aggressive, highly competitive leaps that threaten to compress the valuation premiums of current market darlings.

Full Analysis

ISSCC 2026 reveals that the AI hardware bottleneck is rapidly shifting from pure compute node shrinks to advanced packaging, memory density, and optical interconnects. The market is currently pricing in perpetual dominance for SK Hynix in memory and pure-play AI names, but technical data shows legacy laggards like Samsung (HBM4), Kioxia/WDC (NAND), and Intel (Packaging/Interconnects) are making aggressive, highly competitive leaps that threaten to compress the valuation premiums of current market darlings.

Read time 56 min

Length 56,765 chars

Category finance

Trade Ideas

Afzal Ahmad Substack author, SemiAnalysis

Samsung's HBM4 performance is closing the gap with SK Hynix, threatening the current HBM monopoly narrative.

The market prices SK Hynix as the undisputed king of HBM. However, Samsung's aggressive move to use a premium SF4 logic base die for HBM4 is yielding superior pin speeds (13 Gb/s) that exceed JEDEC standards. If Samsung secures major Nvidia Rubin allocations, expect a massive valuation catch-up trade as SK Hynix's premium compresses.

Afzal Ahmad Substack author, SemiAnalysis

WDC/Kioxia's BiCS10 NAND achieves industry-leading bit density, setting up a structural margin advantage.

WDC's joint venture with Kioxia has quietly taken the density crown in NAND, beating SK Hynix by 30% in QLC configurations. This structural cost-per-bit advantage is not fully priced into WDC shares, positioning them to capture outsized margins and market share in the upcoming enterprise SSD upgrade cycle.

Afzal Ahmad Substack author, SemiAnalysis

Marvell's "Coherent-lite" optics perfectly address the emerging bottleneck of campus-scale AI clusters.

As AI training clusters grow too large for single buildings, datacenter campus interconnects (10-40km) become the new critical bottleneck. Marvell's Coherent-lite cuts power by 50% vs traditional coherent optics while eliminating heavy DSP latency, giving them a dominant, high-margin product for the upcoming wave of multi-building AI cluster buildouts.

Afzal Ahmad Substack author, SemiAnalysis

TSMC's Active LSI (aLSI) packaging creates a new, high-margin moat that locks in AI accelerator customers.

The market views TSMC's CoWoS primarily as a capacity bottleneck, but misses the technological lock-in of their next-gen Active LSI packaging. By embedding active transistors into the bridge die, TSMC allows Nvidia and AMD to shrink their PHY area and pack more compute. This deepens TSMC's moat, ensuring pricing power remains absolute even as front-end node scaling slows.

Afzal Ahmad Substack author, SemiAnalysis

Intel's advanced packaging and interconnect IP are showing surprising technical leadership, offering a mispriced call option.

Market sentiment on Intel is abysmal, yet their 22nm UCIe-S interconnect beat a competitor's 3nm design, and their 18A hybrid bonding (M3DProc) showed massive 875 GB/s 3D bandwidth. This signals that Intel's advanced packaging IP remains world-class; if 18A yields even adequately, the custom silicon/foundry business is severely underpriced at current levels.

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This newsletter, published April 15, 2026, features Afzal Ahmad discussing SSNLF, WDC, MRVL, TSM, INTC. 5 trade ideas extracted by AI with direction and confidence scoring.

Speakers: Afzal Ahmad · Tickers: SSNLF, WDC, MRVL, TSM, INTC