Идеи
The article presents a cautiously bullish view on AMD's AI accelerator prospects, citing hardware leadership (MI455X), improving software, and aggressive financial engineering. However, it identifies
The article presents a cautiously bullish view on AMD's AI accelerator prospects, citing hardware leadership (MI455X), improving software, and aggressive financial engineering. However, it identifies two major risks (Helios production ramp and GPU cluster shortage) that could derail progress. The author states 'we strongly believe that AMD will be well positioned to do well and take market share as long as AMD solves the 2 major risks'.
Risk: Execution on Helios rack manufacturing and provision of stable internal GPU clusters remain unresolved; any delays could widen the gap with Nvidia.
The article acknowledges that 'NVIDIA will continue to massively grow revenue' and that 'the pie is getting massive', while noting that AMD's competition will pressure Nvidia to move faster. Comparati
The article acknowledges that 'NVIDIA will continue to massively grow revenue' and that 'the pie is getting massive', while noting that AMD's competition will pressure Nvidia to move faster. Comparative specs show Nvidia's Rubin still leads in 3-bit LUT tensor cores and system integration, and Nvidia's software moat remains strong, particularly in disaggregated inference where Nvidia has a multi-year head start.
Risk: AMD's improved hardware and software could erode Nvidia's market share over time, especially if Nvidia's internal bureaucracy slows innovation.
The article highlights that AMD is the first to ship 2nm datacenter silicon (N2) for MI455's compute tiles and Venice CPU, and uses TSMC's CoWoS-L with active LSI (first shipping implementation). TSMC
The article highlights that AMD is the first to ship 2nm datacenter silicon (N2) for MI455's compute tiles and Venice CPU, and uses TSMC's CoWoS-L with active LSI (first shipping implementation). TSMC is the exclusive supplier for these advanced packaging and process nodes, directly benefiting from AMD's ramp.
Risk: No direct risk; TSMC benefits from both AMD and Nvidia demand.
AMD's Helios rack uses 12 Tomahawk6 switches from Broadcom (102.4T each) and over 550 Broadcom ethernet retimers per rack for backplane signal integrity. Broadcom is the sole merchant supplier for the
AMD's Helios rack uses 12 Tomahawk6 switches from Broadcom (102.4T each) and over 550 Broadcom ethernet retimers per rack for backplane signal integrity. Broadcom is the sole merchant supplier for these high-speed switches and retimers, capturing significant content per rack.
Risk: Dependence on Broadcom's ability to deliver sufficient volumes for AMD's ramp; any supply constraints could impact Helios production.
The article notes 'tight memory supply' and that HBM4 suppliers had to rework their designs to meet Nvidia's higher pin speeds. AMD's MI455 uses 12 stacks of HBM4, and the industry-wide HBM ramp benef
The article notes 'tight memory supply' and that HBM4 suppliers had to rework their designs to meet Nvidia's higher pin speeds. AMD's MI455 uses 12 stacks of HBM4, and the industry-wide HBM ramp benefits memory manufacturers like Micron. The article implies HBM4 supply is a bottleneck that validates strong demand for HBM suppliers.
Risk: Memory pricing and supply allocation between AMD and Nvidia could create volatility; Micron's dependency on a few large customers.
This newsletter, published July 25, 2026,
features Bryan Shan
discussing AMD, NVDA, TSM, AVGO, MU.
5 trade ideas extracted by AI with direction and confidence scoring.
Speakers:
Bryan Shan
· Tickers:
AMD,
NVDA,
TSM,
AVGO,
MU