Why smarter AI models could drive up compute prices 10x

Watch on YouTube ↗  |  August 03, 2026 at 17:36  |  11:18  |  Dwarkesh Patel
Speakers
Dwarkesh Patel — Host, Dwarkesh Podcast

Summary

Dwarkesh Patel argues that AI lab revenue is compounding far faster than compute supply, making sharply higher compute prices likely. He examines whether higher lab margins, higher compute prices, or more inference spending closes the gap and concludes compute pricing is the main escape valve. He also identifies specific supply bottlenecks at ASML and TSMC and warns that weaker AI applications may get priced out.

  • Anthropic revenue has 10x'd for three consecutive years while lab compute only 3x's yearly.
  • The revenue-compute gap can be closed by higher lab margins, higher compute prices, or a bigger inference share.
  • Spot compute is up over 40% since February and frontier secured GPU rentals are around 2x spot.
  • As AI models become human-level, equivalent compute could monetize over 15x current H100 rental rates.
  • Compute supply growth depends on Moore's Law, new fabs, and wafer reallocation, all of which appear constrained.
  • ASML EUV machine production is a bottleneck for fab buildout through 2030 and possibly beyond.
  • TSMC's leading-edge AI wafer allocation is approaching saturation at N3 nodes.
Ideas
Dwarkesh Patel Host, Dwarkesh Podcast 1:14
Compute prices can rise tenfold.
Anthropic's revenue is growing 10x per year while lab compute grows only 3x per year, and labs want to keep most compute for training rather than become inference cloud providers. Since >90% margins on intelligence seem unlikely to persist without being competed away, the main escape valve is higher compute prices. Spot compute is already up more than 40% since February, frontier secured GPU capacity rents near 2x spot, and a human-level software engineer on one H100-equivalent could generate over $250K per year, which is more than 15x the current H100 spot price.
Dwarkesh Patel Host, Dwarkesh Podcast 8:12
ASML EUV bottleneck constrains fab buildout.
Of the 3x yearly compute growth, 1.2x comes from building new fabs, and that process is bottlenecked through 2030 and potentially beyond by the ability to build ASML EUV machines. This gives ASML a structural bottleneck as AI compute capacity scales.
Dwarkesh Patel Host, Dwarkesh Podcast 8:36
TSMC AI wafer capacity hits saturation.
AI is absorbing leading-edge wafer allocation that previously went to smartphones and PCs; at TSMC's leading-edge N3 nodes AI will go from 60% to 86%. Once all leading-edge wafer capacity is absorbed by AI, that reallocation source of compute growth hits a wall, making TSMC's leading-edge capacity increasingly scarce.
Up Next

This Dwarkesh Patel video, published August 03, 2026, features Dwarkesh Patel discussing AI compute, H100 GPU compute, GB200/GB300 GPU capacity, ASML, TSM. 3 trade ideas extracted by AI with direction and confidence scoring.

Speakers: Dwarkesh Patel  · Tickers: AI compute, H100 GPU compute, GB200/GB300 GPU capacity, ASML, TSM