The Hidden Supply Chain Crisis Behind AI Hype

Watch on YouTube ↗  |  February 06, 2026 at 21:05  |  15:00  |  TBPN
Speakers
John Coogan — Co-Host, TBPN
Jordi Hays — Co-Host, TBPN

Summary

TBPN hosts discuss why AI's key bottleneck has shifted from energy to leading-edge semiconductors. They trace the chip shortage to inelastic fab capacity, TSMC's dominance, ASML's EUV monopoly, and the need for alternative foundries like Samsung and Intel. They also flag energy as a potential later bottleneck, while touching on AI software momentum and current AI-industry news.

  • AI bottleneck discussion has shifted from energy to leading-edge chip fabrication.
  • Leading-edge wafer capacity is inelastic because fabs are costly and slow to build.
  • TSMC is described as the central bottleneck, with about 90% advanced-node share.
  • ASML is highlighted as the sole viable EUV lithography supplier and a deeper bottleneck.
  • Ben Thompson's argument for making Samsung and Intel viable TSMC alternatives is reviewed.
  • Energy is framed as a possible 2027 bottleneck despite current chip scarcity.
  • The hosts also cover AI model momentum, Anthropic rate limits, and recent AI news.
Ideas
John Coogan Co-Host, TBPN 0:53
Energy is next AI bottleneck
Energy is the next AI bottleneck, potentially a 2027 problem. Unlike semiconductors, U.S. energy production has been flat and in a long malaise, and the industry was not built for exponential growth. The speaker expects this to matter again and notes that suppliers can reallocate capacity from adjacent areas, including turbines, reciprocating engines, and diesel engines, to help meet data-center power demand.
John Coogan Co-Host, TBPN 8:42
Chip supply bottleneck favors semiconductor supply chain
The AI supply chain bottleneck has shifted from energy to leading-edge chips. The semiconductor industry is used to exponential growth, but leading-edge wafer capacity is inelastic because fabs cost tens of billions and take three to five years, while hyperscaler demand is outstripping supply. This creates a structural shortage and revenue/pricing opportunity across the AI semiconductor supply chain, even if energy becomes a bottleneck later.
John Coogan Co-Host, TBPN 11:41
ASML monopolizes EUV, benefits from fab buildout
ASML is a bottleneck within the chip bottleneck. It is the only viable producer of EUV lithography machines, shipping around 50-60 machines per year at roughly $350 million each, while leading-edge fabs need dozens and ASML's own specialized supply chain is not diversified. This monopoly-like position gives ASML structural leverage to any leading-edge fab buildout.
John Coogan Co-Host, TBPN 12:36
TSMC dominates advanced nodes, supply inelastic
TSMC is the real bottleneck in advanced AI chips. It controls about 90% of the advanced-node market, its leading-edge wafer supply is inelastic, its Arizona fab took five years and still is not at volume, and its process know-how is locked in decades of engineering talent. Demand from hyperscalers is pushing capex into hundreds of billions, so TSMC's dominance and scarcity value should persist despite geopolitical and diversification risks.
John Coogan Co-Host, TBPN 13:34
Samsung, Intel as TSMC alternatives
Ben Thompson's argument, which the host presents, is that hyperscalers and fabless chip companies need to reduce reliance on TSMC. Avoiding Samsung or Intel creates hidden but substantial supply risk, and future foregone revenue from AI chip shortages could exceed the cost of making Samsung or Intel viable leading-edge competitors. That creates a potential catalyst for Samsung and Intel as alternative foundries.
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