Summary
The speaker examines AI's role in chip design and bring-up, arguing that AI assistance already delivered meaningful area reductions in SIMD and matrix engine blocks before GPT-5. They emphasize that AI can accelerate tedious RTL work before tapeout, an application that may be less widely appreciated than software engineering use cases.
- Discusses AI assistance in semiconductor design and bring-up
- Claims AI assisted an 8% reduction in SIMD area
- Claims AI assisted a 10% reduction in matrix engine area
- Notes these results occurred pre-GPT-5
- Argues models are likely improving at RTL over time
- Says AI can accelerate tedious RTL work before tapeout
- Contrasts chip design with more familiar AI use in software engineering